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WIKICROOK

TLB invalidation

The process of clearing stale address-translation entries so memory mappings stay correct.

TLB invalidation is the process of clearing stale entries from the Translation Lookaside Buffer, a CPU cache that speeds up virtual-to-physical address translation. When a page table changes, the old translation must be removed so the processor does not keep using memory mappings that are no longer valid.

In cyber security, correct TLB invalidation is critical for isolation. Operating systems, hypervisors, and sandboxing code depend on it to prevent one process, guest, or privilege level from seeing memory it should not access. Attackers often look for bugs where invalidation is missed, delayed, or applied to the wrong address range, because stale translations can lead to use-after-free conditions, memory corruption, or boundary bypasses. Defenders focus on careful page-table updates, feature-specific testing, and kernel or firmware patches that keep translation state synchronized.

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